Leading the Embedded World

Technology overview

The Green Hills Probe V4 is the fastest and most capable JTAG and trace debug probe ever made by Green Hills Software. Its 4GB of high-speed trace memory and 40 Gbits/second aggregate bandwidth combine with the MULTI Integrated Development Environment to enable software developers to find and fix bugs faster, optimize quickly, and test with confidence.

Key features

  • 4GB of high-speed trace memory with 40 Gbits/second of aggregate bandwidth
  • Supports the latest high-speed serial trace (HSST) protocols, including multiple 12.5Gb serial lanes
  • The fastest download speeds, capable of sustaining a 120MHz JTAG clock rate with nearly 100% data payload utilization
  • Supports all leading debug and trace interfaces on thousands of processors
  • Tight integration with the TimeMachine Debugging Suite
  • Offers sophisticated analysis tools for quickly locating key execution points in large datasets
  • LCD status screen for easy access to configuration settings, diagnostics and factory reset
  • USB host and power ports, Ethernet switch and port

With 4GB of high-speed trace memory and 40 Gbits/second aggregate bandwidth, Green Hills Probe V4 is the fastest and most capable JTAG and trace debug probe Green Hills Software has ever made.

Designed to Find Heisenbugs

The Probe V4 was designed to find Heisenbugs, which are bugs that disappear or don’t reproduce while debugging. These insidious bugs are responsible for endless software and product delays. Through fast trace capture over industry-standard protocols and with a deep capture buffer, the Green Hills Probe V4 provides all developers on all leading processors the most effective weapon against Heisenbugs: trace capture.

Run-control and trace features

  • Broad Target Support
    Green Hills Probe V4 supports an extensive range of target trace ports on thousands of processors.
  • RTOS awareness
    Coupled with the MULTI IDE, the Probe V4 provides RTOS-aware debugging of Green Hills Software's INTEGRITY RTOS.
  • Flexible Trace Clock
    With its flexible trace clock interface, Green Hills Probe V4 can automatically adjust for timing skew between trace data and clock lines for more reliable trace collection.
  • Variable Target Voltage
    The Green Hills Probe V4 can select between a range of I/O interface voltages from 1.65V to 5V for connecting to a variety of targets.
  • Multicore Debugging
    The Green Hills Probe V4 supports debugging of multiple cores in a single JTAG scan chain as well as multicore trace. The Green Hills Probe V4 can be used in the most complex debug situations.

Fastest Download Speeds

With its 4GB of high-speed trace memory and 40 Gbits/second of aggregate bandwidth, the Probe V4 enables faster development by minimizing the time spent waiting for downloads to complete. It supports JTAG clocks from 2.5 kHz to 120 MHz with nearly 100% data payload utilization to maximize the download speed to the target processor.

Cycle Accurate

When provided for by trace targets, the Green Hills Probe V4 captures trace data in cycle accurate mode so developers can determine how many cycles each instruction takes. This allows analysis of the effects of cache and other memory systems. Besides providing insight into memory systems, cycle accurate mode accurately determines system performance and measures the effects of optimization efforts.

Flexible and Modular

The Green Hills Probe V4 simplifies customer configurations because it replaces both the Green Hills Probe V3 and the SuperTrace Probe. A single processor-independent Green Hills Probe V4 is configured with either a pod for JTAG and parallel trace or a pod for high-speed serial trace (HSST). A processor adapter is then added to match the target processor.

Expanded System and Test Automation

The Green Hills Probe V4 provides and instruments the most common power and communications interfaces used by target boards, simplifying not only the physical cabling to a target board, but also providing debugging insight into these interfaces.

  • Target boards can be powered with a switchable 12V/2A power port or a 5V/1.5A USB Type A interface.
  • Integrated, instrumented Ethernet switch with a second Ethernet port on the front panel for use by the target board.
  • USB host support for attached USB serial adapters for communication to target board serial ports.

Supported target families

Arm Architecture

  • Arm7, Arm9, Arm11
  • Cortex-M0, Cortex-M3, Cortex-M4,
    Cortex-M7, Cortex-M23, Cortex-M33
  • Cortex-R4, Cortex-R5, Cortex-R7,
    Cortex-R8, Cortex-R52
  • Cortex-A5, Cortex-A7, Cortex-A8,
    Cortex-A9, Cortex-A15, Cortex-A17,
    Cortex-A35, Cortex-A53,
    Cortex-A55, Cortex-A57, Cortex-A72,
    Cortex-A73, Cortex-A75, Cortex-A76
    - XScale PXA250, PXA255

Power Architecture

  • PowerPC 4xx, 6xx, 7xx, 74xx, 82xx, 83xx, 86xx
  • RAD series
  • PowerPC e200, e300, e500, e600, e500MC, e5500, e6500
  • NXP MPC55xx, 56xx, 57xx, PX, S32R families
  • ST Micro SPC56xx, 57xx, 58xx
  • NXP QorIQ P-Series and T-Series


  • RV64

NXP Coldfire

  • MCF52xx/53xx/54xx

Intel Architecture

  • Atom Apollo Lake
  • Tiger Lake


  • MIPS32, MIPS64


Supported debug and trace architectures

  • Arm CoreSight
  • Arm ETM v1, v3, v4
  • Arm-14/20
  • Arm PRM
  • Arm PTM
  • Arm SWD
  • COP
  • CoreSight HSSTP
  • EJTAG2.5
  • EOnCE
  • Intel MIPI
  • MIPS PDTrace
  • Nexus
  • NXP ColdFire
  • TI-14
  • Infineon Tricore/AURIX
  • Xilinx-14

Make sense of complex systems

Probe V4 is closely integrated with the MULTI IDE to enable software developers to realize the full benefit from trace data it collects. The MULTI IDE’s TimeMachine debugger and History viewer provide a range of visual tools to find and fix bugs faster, optimize more quickly, and test with confidence within multi-user teams.

History viewer

These three questions are at the foundation of debugging code and making your system run faster. The History viewer answers these questions.

  • How did the program get here?
  • Where is time being spent?
  • Is the program doing anything unexpected?

The History viewer provides answers for all three of these questions.

History viewer displays the last few seconds, minutes or days of program execution across complex heterogenous multicore systems with a natural and intuitive GUI. For the first time you now have a clear, complete view into a murky hardware and software system. You can zoom deeply into processor behavior at the micro-second level or zoom out to see system behavior spanning minutes and days. This new kind of visibility empowers you to find difficult bugs in seconds, see hidden bottlenecks and dependencies, and analyze execution times.

MULTI History viewer

History provides unprecedented visibility into your system by displaying the last few seconds, minutes, or days of program execution across complex heterogenous multicore systems.

TimeMachine back-in-time debugging

By automatically capturing actual program execution data TimeMachine enables the Debugger to run, step and debug code backward to any problem area shown in History. It also powers other tools such as the Profiler.

TimeMachine back-in-time debugger

TimeMachine enables the MULTI Debugger to run, step, and analyze your program forward and backward in time to find the root cause of problems.

Debug pods

The Green Hills Probe V4 can be configured to support parallel trace and JTAG target connections via the TE trace pod or serial trace targets via the High-Speed Serial Trace (HSST) pod.

It supports a broad range of target adapters including:

  • Arm CoreSight-10
  • Arm CoreSight-20
  • Arm ETM/CoreSight MICTOR
  • Arm-14
  • Arm-20
  • COP
  • CoreSight HSSTP
  • EJTAG2.5
  • EOnCE
  • Intel MIPI60
  • MIPI-60
  • MIPS PDTrace
  • Nexus HP50
  • Nexus HS22 (Aurora-11)
  • Nexus HS34 (Aurora-17)
  • Nexus HS70 (Aurora-35)
  • Nexus MICTOR
  • TI-14
  • Tricore
  • Xilinx-14